Intel Alder Lake architecture overview: Heterogeneous ISA, dynamic Thread Director, shared 30 MB L3 cache, and more

Intel’s new 12th gen Alder Lake platform brings with several notable changes on the architecture side. Alder Lake processors use a heterogeneous ISA with a shared L3 cache and an intelligent Thread Director that helps the OS in proper scheduling of threads. The CPU brings support for DDR5-4800 RAM and PCIe Gen5, but the Z690 chipset supports only PCIe Gen4 and Gen3.